Channel Interrupt Mask Register (chid = 0)
BIM | End of Block Interrupt Mask Bit |
LIM | End of Linked List Interrupt Mask Bit |
DIM | End of Disable Interrupt Mask Bit |
FIM | End of Flush Interrupt Mask Bit |
RBEIM | Read Bus Error Interrupt Mask Bit |
WBEIM | Write Bus Error Interrupt Mask Bit |
ROIM | Request Overflow Error Interrupt Mask Bit |